Analytical derivation of traffic patterns in cache-coherent shared-memory systems

Publication: Research - peer-reviewJournal article – Annual report year: 2011

View graph of relations

This paper presents an analytical method to derive the worst-case traffic pattern caused by a task graph mapped to a cache-coherent shared-memory system. Our analysis allows designers to rapidly evaluate the impact of different mappings of tasks to IP cores on the traffic pattern. The accuracy varies with the application’s data sharing pattern, and is around 65% in the average case and 1% in the best case when considering the traffic pattern as a whole. For individual connections, our method produces tight worst-case bandwidths.
Original languageEnglish
JournalMicroprocessors and Microsystems
Publication date2011
Volume35
Journal number7
Pages632-642
ISSN0141-9331
DOIs
StatePublished
CitationsWeb of Science® Times Cited: 0

Keywords

  • Traffic patterns, Shared-memory systems, Task graphs
Download as:
Download as PDF
Select render style:
APAAuthorCBEHarvardMLAStandardVancouverShortLong
PDF
Download as HTML
Select render style:
APAAuthorCBEHarvardMLAStandardVancouverShortLong
HTML
Download as Word
Select render style:
APAAuthorCBEHarvardMLAStandardVancouverShortLong
Word

ID: 5896896