A digitally controlled 2.4-GHz oscillator in 65-nm CMOS

Publication: Research - peer-reviewConference article – Annual report year: 2009

Without internal affiliation

  • Author: Xu, Liangge

    Helsinki Univ Technol

  • Author: Lindfors, Saska

    Helsinki Univ Technol

  • Author: Stadius, Kari

    Helsinki Univ Technol

  • Author: Ryynanen, Jussi

    Helsinki Univ Technol

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This article presents a 2.4-GHz digitally controlled oscillator (DCO) for the ISM band. The circuit is designed using a 65-nm CMOS technology with an operating voltage of 1.2 V. The DCO comprises an LC oscillator core and the digital interface logic. The measured total frequency range is from 2.26 to 3.04 GHz. Its frequency quantization step is approximately 20 kHz, and using a digital I I"-modulator pound (SDM), its effective frequency resolution is better than 1 kHz. Current consumption of the oscillator core is tunable through a 6-bit digital word. The measured phase noise is -122 dBc/Hz at 1-MHz offset frequency with 4.8-mA current consumption.
Original languageEnglish
JournalAnalog Integrated Circuits and Signal Processing
Publication date2009
Volume58
Issue1
Pages35-42
ISSN0925-1030
DOIs
StatePublished

Conference

ConferenceNorchip Conference
Number25
CityAalborg, DENMARK
Period01/01/07 → …
CitationsWeb of Science® Times Cited: 0
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