Publication: Research - peer-review › Book chapter – Annual report year: 2012
This paper deals with a system-level design of a digital sigma-delta (∑∆) modulator for hearing-aid audio Class D output stage application. The aim of this paper is to provide a thorough discussion on various possibilities and tradeoffs of ∑∆ modulator system-level design parameter combinations - order, oversampling ratio (OSR) and number of bits in the quantizer - including their impact on interpolation filter design as well. The system is kept in digital domain up to the input of the Class D power stage including the digital pulse width modulation (DPWM) block. Notes on the impact of the DPWM block on the modulated spectrum are provided.
|Title||8th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)|
|Conference||2012 8th Conference on Ph.D. Research in Microelectronics and Electronics|
|Period||12/06/12 → 15/06/12|
- Sigma-Delta modulator, Interpolation filter, Class D, Hearing aid, Low voltage, low power
Loading map data...